1. Field of the Invention
The present invention relates to the structure of a semiconductor device including a semiconductor circuit constituted by a plurality of insulated gate type transistors, such as thin film transistors using semiconductor thin films, and to a method of manufacturing the same. The semiconductor device of the present invention includes also an electronic equipment having a semiconductor circuit constituted by insulated gate type transistors, such as an active matrix type liquid crystal display device and an image sensor.
2. Description of the Related Art
In recent years, attention has been paid to an active matrix type liquid crystal display device (hereinafter abbreviated to AMLCD) in which a pixel matrix circuit and a driving circuit are constituted by TFTs formed on an insulating substrate.
As an insulating substrate, it is desired to use an inexpensive glass substrate rather than using an expensive substrate, such as a quartz substrate, from the industrial viewpoint.
Such AMLCDs include devices of various sizes from one with a size of about 0.5 to 2 inches for a projector to one with a size of about 10 to 20 inches for a note-sized personal computer, and are mainly used as displays from a small-sized one to a middle-sized one.
When the AMLCD is made middle-sized, the area of a pixel matrix circuit, which becomes a picture display portion, is increased. If it is required to increase the area of a liquid crystal display, the area of the pixel matrix circuit, which becomes the picture display portion, is also increased. With the increase of the area, the length of a source wiring line, a gate wiring line, and the like arranged in matrix become long, so that wiring resistance is increased. Further, because of the request for miniaturization, it is necessary to make the wiring line thin, so that the increase of the wiring resistance becomes more tangible. Moreover, with respect to the source wiring line and gate wiring line, since a TFT is connected to each of pixels and the number of pixels is increased, increase of parasitic capacitance also becomes a problem. In the liquid crystal display, a gate wiring line and a gate electrode are integrally formed in general, so that delay of a gate signal becomes tangible with the increase of the area of a panel.
Thus, a material mainly containing aluminum with low specific resistance is used for the gate wiring line. While the aluminum material has the merit of low resistance, the material has the demerit of poor heat resistance. When the gate wiring line and gate electrode are formed of a material containing aluminum as its main ingredient, a gate delay time can be made short and a high speed operation can be made.
For example, in Japanese Patent Unexamined Publication No. Hei. 7-135318 by the same assignee as this application, there is disclosed a TFT structure in which a thin film (also called aluminum alloy) containing aluminum as its main ingredient is used for a gate wiring line, and the periphery of the gate wiring line is protected by an anodic oxidation film (alumina film). No. Hei. 7-135318 in turn corresponds to U.S. Pat. No. 5,598,284. An entire disclosure of No. Hei. 7-135318 and U.S. Pat. No. 5,598,284 is incorporated herein by reference. The thin film containing aluminum as its main ingredient in the present specification includes also a thin film including an extremely small amount of impurity, such as a film of so-called high purity aluminum.
In the case where the TFT structure disclosed in the above publication is adopted, a step of etching an alumina film becomes necessary to connect a gate wiring line to a lead wiring line. At first, the present assignee used an etchant (a mixed solution of ammonium fluoride and hydrofluoric acid) called buffered hydrofluoric acid at etching of the alumina film.
However, buffered hydrofluoric acid has a small selection ratio of alumina (typically Al2O3) to aluminum, so that there is a problem that not only the alumina film but also the gate wiring line under the alumina film is etched. The state is shown in FIG. 30.
In FIG. 30, reference numeral 81 denotes a substrate having an insulating surface, 82 denotes an insulating film (functioning as a gate insulating film on an active layer) made of a silicon oxide film, 83 denotes a gate wiring line made of aluminum alloy, and 84 denotes an alumina (anodic oxidation) film obtained by anodic oxidation of the gate wiring line 83.
When part of the upper surface of the alumina film 84 is etched by buffered hydrofluoric acid, the gate wiring line 83 is first exposed. Normally, since etching is carried out with a distribution to some degree on the substrate surface, it becomes necessary to completely remove the alumina film 84 by overetching.
At this time, if overetching is excessively carried out, the gate wiring line 83 is etched by buffered hydrofluoric acid. In the worst case, there can occur a case where an etching hole 85 passes through the gate wiring line 83 and reaches the insulating film 82.
If such a state occurs, only the section of the gate wiring line 83 as indicated by 86 (thick line) comes in contact with a lead wiring line (not shown). When it is considered that while the diameter of a general contact hole is several microns, the thickness of a gate wiring line is several hundreds nm, in the state shown in FIG. 30, the contact area between the gate wiring line and the lead wiring line is reduced to about {fraction (1/100)} of a normal area.
That is, if the state as shown in FIG. 30 occurs, the contact area between wiring lines is extremely reduced, so that electrical connection becomes almost impossible. Thus, it becomes impossible to operate the TFT and causes an erroneous operation of a circuit itself.
If there is such a structure that an active layer of a TFT exists under the insulating film 82 (for example, in the case where the contact between the gate electrode and lead wiring line is made over the TFT), it is possible that the lead wiring line is short-circuited to the active layer.
Then, the present applicant developed a process using a specific etchant instead of the foregoing buffered hydrofluoric acid. The etchant used by the present assignee is obtained by mixing a chromic acid solution of 550 grams (chromium of 300 grams, water of 250 grams) with a solution of 10 liters which is a mixture of phosphoric acid, nitric acid, acetic acid, and water mixed at a ratio of 85:5:5:5. The present assignee refers to this etchant as chromium mixed acid.
This chromium mixed solution has such selectivity that although an alumina film of an anodic oxidation film is etched, an aluminum film is not etched, and by using the property, it is possible to selectively etch only the alumina film.
Like this, in the present circumstances, a contact hole for connecting a gate electrode to a lead wiring line is formed by a specific etchant. This method has certainly a high yield factor and can realize an excellent ohmic contact.
However, in view of the fact that a large amount of heavy metal chromium, which has a possibility to damage a human body, is required to be used, the process of using chromium mixed acid is not desirable in industry. From such a reason, although development of a substitution etchant substituting chromium mixed acid has been hastened, in the present circumstances, such an etchant has not been found.
For a high speed operation, it is necessary to decrease the sheet resistance between source/drain regions and source/drain wiring lines connected to these regions. For the purpose of decreasing the resistance of the source/drain regions, silicide layers of refractory metal such as Ta or Ti are formed on the surfaces of the source/drain regions.
As an active layer of a TFT, it is considered to be promising to use a crystalline silicon film having mobility higher than that of an amorphous silicon film. Conventionally, in order to obtain the crystalline silicon film by a heat treatment, it is necessary to use a quartz substrate having a high distortion point.
Then the present applicant et al. developed a technique (Japanese Patent Unexamined Publication No. Hei. 6-232059 and No. Hei. 7-321339) to obtain a crystallized silicon film by introducing a very small amount of material into an amorphous silicon film and then carrying out a heat treatment. An entire disclosure of No. Hei. 6-232059 and No. Hei. 7-321339 is incorporated herein by reference. As a material for facilitating crystallization, a kind of or plural kinds of elements selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au are used. By using this technique, it became possible to manufacture a crystalline silicon film through a process (low temperature process) at a temperature where a glass substrate can withstand.
However, this technique has a problem that a material used for crystallization remains in the crystalline silicon film, and the material has a bad influence on the component characteristics (especially, reliability, uniformity, and the like) of a TFT. Thus, the present applicant et al. further developed a technique (Japanese Patent Unexamined Publication No. Hei. 8-330602) to getter a material in the crystalline silicon film after formation of a wiring line using an aluminum material. An entire disclosure of No. Hei. 8-330602 is incorporated herein by reference.
However, in the above gettering technique, since the aluminum material having low heat resistance is used for the wiring line, a heat treatment is restricted within a temperature range (about 300 to 450xc2x0 C.).
Since the above temperature range is low as a temperature at which the material in the crystalline silicon film is sufficiently guttered, a long treatment time is required. However, since the heat resistance of aluminum material is low, heating for a long time has been avoided. Even in a heat process in the temperature range (about 300 to 450xc2x0 C.), aluminum atoms diffuse into a gate insulating film and reach a channel formation region, so that the atoms have caused a bad operation of a TFT or lowering of TFT characteristics.
Similarly, even in the heating treatment within the above temperature range, protrusions, such as hillocks or whiskers, produced from the aluminum material by the heat treatment go through the gate insulating film and reach the channel formation region, so that they have caused a bad operation of the TFT.
In addition, similarly, even in the heating treatment within the above temperature range, there exists a pinhole in the gate insulating film, so that aluminum atoms have flown at the heat treatment, entered the pinhole, and reached the channel formation region.
Like this, as the result that the present inventors et al. analyzed the malfunction of the TFT which had produced a bad operation, it was found that there was a possibility that a short circuit took place between the gate electrode and the channel.
It is inferred that the gate electrode and the channel are short-circuited by some reason although they are insulated from each other by the gate insulating film, so that the TFT causes the bad operation. The following three factors are conceivable for this.
(1) Aluminum atoms diffuse into the gate insulating film, and reach the channel which is in contact with the gate electrode through the gate insulting film.
(2) Protrusions produced from the aluminum material, such as hillocks or whiskers, go through the gate insulating film and reach the channel.
(3) There exists a pinhole in the gate insulating film, so that aluminum atoms flow at the heat treatment, enter the pinhole, and reach the channel.
Although the above described factors are conceivable, a definite mechanism is not clear in the present circumstances. However, it is almost certain that a short circuit between the gate electrode and the channel is the cause, and there is a high possibility that any one of the above three factors is the cause.
An object of the present invention is to provide a technique to realize a TFT, which uses an aluminum material as a gate electrode, at a high yield factor.
Another object of the present invention is to provide a technique to prevent a short circuit between a gate electrode and a channel (active layer).
Still another object of the present invention is to provide a novel forming method of an LDD region.
Still another object of the present invention is to provide a method of manufacturing a TFT in which aluminum atoms do not diffuse into a gate insulting film in the case where a heat treatment is added after a wiring line using an aluminum material is formed.
While an aluminum material has a merit that resistance is low, it has a demerit that heat resistance is low. Thus, in the case where a gate electrode and a gate wiring line are formed of a material containing aluminum as its main ingredient, it is difficult to use a salicide (self-aligned silicide) step to make the surfaces of source/drain regions silicide.
Since hillocks or whiskers are apt to occur when aluminum is subjected to a heat treatment, in a step after the formation of the gate electrode and gate wiring line, the upper limit of a process temperature is limited within the range of 300 to 450xc2x0 C.
However, in a TFT using an aluminum wiring line, even at a heating temperature within the range of 300 to 450xc2x0 C., a bad operation of the thin film transistor due to a short circuit between a gate electrode and a channel was confirmed. It appears that the cause is that protrusions produced at the gate electrode, such as hillocks or whiskers, go through a gate insulating film and reach a channel formation region, or that aluminum atoms diffuse into the gate insulating film.
On the other hand, a heat treatment at a temperature exceeding 400xc2x0 C. becomes necessary to make source/drain regions silicide. In the field of LSI, titanium silicide is mainly used for the purpose of decreasing the sheet resistance of the source/drain regions. However, in order to form titanium silicide by reacting a titanium (Ti) film with silicon, a heat treatment at a temperature of about 500 to 600xc2x0 C. becomes necessary.
Conventionally, in view of heat resistance of an aluminum wiring line and reliability of a TFT, it was impossible to carry out a step of making silicide after formation of a gate electrode and wiring line made of aluminum.
Objects of the present invention are to solve the foregoing problem, to provide an insulated gate type transistor capable of operating at high speed, in which the resistance of a gate electrode and wiring line is reduced by using an aluminum material for the gate electrode and the gate wiring line material, and at the same time, the sheet resistance of source/drain regions is reduced by forming silicide layers on the surfaces of the source/drain regions, and to provide a method of manufacturing the same.
Particularly, an object of the present invention is to provide a technique in which even if a step of heat treatment is added after formation of a wiring line using an aluminum material, aluminum atoms do not diffuse into a gate insulating film, so that an insulated gate type transistor can be manufactured at a high yield factor.
The present inventors developed an etchant substituting chromium mixed acid, and at the same time, examined a process not using chromium mixed acid from the viewpoint of a TFT structure.
An object of the present invention is to realize an excellent ohmic contact between a wiring line electrically connected to a wiring line and an electrode and the wiring line and the electrode made of a lamination structure of alumina and aluminum, without using chromium mixed acid.
In order to achieve the above objects, according to an aspect of the present invention, a semiconductor device comprises a semiconductor circuit constituted by a plurality of TFTs formed on the same substrate, and is characterized in that each of the TFTs includes an active layer, a gate insulating film, and a gate electrode made of a lamination of a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; and that the tantalum layer has an enough thickness to be capable of functioning as a blocking layer to prevent a constituent element of the material layer containing aluminum or aluminum as its main ingredient from intruding into the gate insulating film.
The gist of the present invention is that the gate electrode, which is conventionally formed of only aluminum material, is made a tantalum/aluminum lamination film (tantalum formes an under layer), so that an aluminum component can be prevented from intruding into the gate insulating film. That is, the tantalum layer disposed as the under layer is used as the blocking layer against the aluminum component.
Thus, the thickness of the tantalum layer must be so thick that the tantalum layer can function as a barrier against the movement of the aluminum component. According to the knowledge of the present inventors et al., the tantalum layer with a thickness of not smaller than 5 nm is required. If the thickness is smaller than the value, the blocking effect can not be expected.
The upper limit of the thickness is considered to be about 200 nm. If the thickness is larger than this value, the aluminum material must be made thin to suppress the total thickness of the gate electrode (to decrease a difference in level), so that the feature of low resistance of aluminum can not be effectively used.
From the above, it is preferable to select the thickness of the tantalum layer within the range of 5 to 200 nm (preferably 10 to 100 nm, more preferably 20 to 50 nm).
The tantalum film has a feature that an anodic oxidation process is easily carried out by the same electrolytic solution as the aluminum film, and modes of formation of an anodic oxidation layer (progressing direction in a forming process of the oxidation layer, and the like) are close to those of the aluminum film, so that tantalum is a suitable material used in the present invention.
According to another aspect of the present invention, a semiconductor device comprises a semiconductor circuit constituted by a plurality of TFTs formed on the same substrate, and is characterized in that each of the TFTs includes an active layer, a gate insulating film, and a gate electrode made of a lamination of a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; and that a tantalum oxide layer is formed in a region of the tantalum layer which does not overlap with the material layer containing aluminum or aluminum as its main ingredient.
According to still another aspect of the present invention, a semiconductor device comprises a semiconductor circuit constituted by a plurality of TFTs formed on the same substrate, and is characterized in that each of the TFTs includes an active layer, a gate insulating film, and a gate electrode made of a lamination of a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; and that the end portion of the tantalum layer protrudes outside of the material layer containing aluminum or aluminum as its main ingredient, and a tantalum oxide layer is formed on the protruding end portion.
According to still another aspect of the present invention, a semiconductor device comprises a semiconductor circuit constituted by a plurality of TFTs formed on the same substrate, and is characterized in that each of the TFTs includes an active layer, a gate insulating film, and a gate electrode made of a lamination of a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; that the end portion of the tantalum layer protrudes outside of the material layer containing aluminum or aluminum as its main ingredient; and that the position of a source or drain contact portion included in the active layer is defined by the protruding end portion.
One of the features of the present invention is that the tantalum oxide layer obtained by anodic oxidation of part of the tantalum layer is used as a mask when an LDD region is formed. That is, through doping is carried out to the active layer through the tantalum oxide layer so that the LDD region is formed under the tantalum oxide layer.
Thus, there is a feature in structure that the tantalum oxide layer having almost the same shape as the LDD region is formed over the LDD region provided in the active layer.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device, which comprises a semiconductor circuit constituted by a plurality of TFTs formed on the same substrate, comprises the steps of: forming an active layer and a gate insulating film; forming a gate electrode by sequentially laminating a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; forming a porous alumina layer by selective first anodic oxidation of only the material layer containing aluminum or aluminum as its main ingredient; and forming a nonporous alumina layer on the surface of the material layer containing aluminum or aluminum as its main ingredient by second anodic oxidation, and at the same time, for transforming the entire or part of the tantalum layer positioned under the porous alumina layer into a tantalum oxide layer.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device, which comprises a semiconductor circuit constituted by a plurality of TFTs formed on the same substrate, comprises the steps of: forming an active layer and a gate insulating film; forming a gate electrode by sequentially laminating a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; forming a porous alumina layer by selective first anodic oxidation of only the material layer containing aluminum or aluminum as its main ingredient; forming a nonporous alumina layer on the surface of the material layer containing aluminum or aluminum as its main ingredient by second anodic oxidation, and at the same time, for transforming the entire or part of the tantalum layer positioned under the porous alumina layer into a tantalum oxide layer; etching the gate insulating film by using the nonporous alumina layer and the porous alumina layer as masks; and adding an impurity to impart an N type or a P type by using the gate electrode, the tantalum oxide layer, and the gate insulating film as masks.
In the above method, the first anodic oxidation is carried out in a solution containing oxalic acid as its main ingredient. In such a solution, only aluminum material is selectively subjected to anodic oxidation, and the tantalum layer remains as it is.
The second anodic oxidation is carried out in a solution containing tartaric acid as its main ingredient. In this solution, both the aluminum material and the tantalum layer are subjected to anodic oxidation. By this process, the aluminum material is covered with a dense nonporous alumina layer, and part (portion being brought into contact with the solution) of the tantalum layer is transformed into a tantalum oxide layer.
According to yet another aspect of the present invention, a semiconductor device comprises: a first wiring layer; a second wiring line formed on a layer upper than the first layer line; and a contact hole for electrically connecting the first wiring line and the second wiring line to each other; and is characterized in that the first wiring line is made of a lamination layer structure in which a thin film containing aluminum as its main ingredient is provided on a valve metal film; and that the second wiring line is in contact with the valve metal film through a contact hole formed to pierce the thin film containing aluminum as its main ingredient.
In the above structure, the valve metal indicates such a metal that an anodically produced barrier type anodic oxidation film allows to flow a cathode current but does not allow to flow an anode current, that is, a valve operation is shown (Electrochemical Handbook, fourth edition; edited by Electrochemical Society, p 370, Maruzen, 1985).
It is necessary that the valve metal film used in the present invention has a low etching rate by buffered hydrofluoric acid, that is, has hydrofluoric acid resistance. As the materials having such a condition, typically, tantalum (Ta), niobium (Nb), hafnium (Hf), zirconium (Zr), and the like can be enumerated.
Particularly, it is ascertained that tantalum can be anodically oxidized by the same electrolytic solution as the thin film containing aluminum as its main ingredient, and is suitable for the present invention. It is also possible to use a tantalum alloy such as molybdenum tantalum (MoTa).
When the above structure is applied to an active matrix type liquid crystal display device, the first wiring line corresponds to a gate wiring line for supplying a gate signal to a plurality of TFTs, and the second wiring line corresponds to a wiring line (which will be referred to as a lead wiring line) for transmitting a signal from the outside to the gate wiring line.
The gist of the present invention is to provide the valve metal film having hydrofluoric acid resistance under the thin film containing aluminum as its main ingredient.
By this, even if the thin film containing aluminum as its main ingredient is etched by buffered hydrofluoric acid, since the valve metal film functions as an etching stopper, it is possible to prevent etching from progressing over the valve metal film.
Moreover, since an excellent ohmic contact can be made between the valve metal film and the second wiring line, it is also possible to prevent poor contact from occurring between the first wiring line and the second wiring line.
As described above, the effect of the present invention is that by the structural improvement of the semiconductor device, an excellent ohmic contact against an aluminum wiring line can be realized without using an etchant, such as chromium mixed acid, which is difficult in industrial handling.
According to still another aspect of the present invention, a semiconductor device comprises a semiconductor circuit including a plurality of TFTs formed on the same substrate, and is characterized in that the TFT includes: a gate electrode of a lamination of a valve metal layer and a material layer containing aluminum or aluminum as its main ingredient; a gate insulating film being in contact with the gate electrode; a channel formation region being in contact with the gate insulating film; a high resistance region being in contact with the channel formation region; and a source region or a drain region being in contact with the high resistance region, that the source region or the drain region includes a material at a high concentration which facilitates crystallization of silicon, and that the high resistance region includes the material at a low concentration.
The gist of the present invention is to prevent aluminum atoms from intruding into the gate insulating film by making the gate electrode of the tantalum/aluminum lamination film (tantalum layer is the lower layer), which is conventionally composed of only aluminum material. That is, the tantalum layer disposed as the lower layer is used as a blocking layer against aluminum atoms which has low heat resistance. By making such a structure, it becomes possible to carry out a heat treatment at a temperature of 300xc2x0 C. or more, preferably 450xc2x0 C. or more, after formation of a wiring line.
The present invention has a feature that after formation of the wiring line, the source region or the drain region is doped with a phosphorus element, and is subjected to a heat treatment at a temperature of 450xc2x0 C. or more, so that the material in a crystalline silicon film is lowered. In this way, it is inferred that the concentration of the material in the channel formation region is lowered down to 1xc3x971017 atoms/cm3, typically about 1xc3x971015 atoms/cm3 which is an undetectable level of SIMS. On the other hand, the concentration of the material in the source region or the drain region is 5xc3x971018 atoms/cm3 or more, typically 1xc3x971019 atoms/cm3 or more. Although another element in group 15, such as arsenic or antimony, may be used other than the phosphorus element, the phosphorus element has the most excellent gettering effect. It is desirable to use nickel as the material for facilitating crystallization.
As a blocking layer other than the above tantalum layer, it is possible to use a metal film or an alloy film mainly containing a metal element having heat resistance (melting point, etc.) higher than aluminum, or an inorganic film (silicon nitride film, silicon nitride oxide film, silicon oxide film). In addition, a lamination film of those may be used. Preferably, it is desirable to use niobium (Nb), hafnium (Hf), zirconium (Zr), titanium (Ti), or the like, which is called a valve metal. Tantalum is one of the valve metal.
The thickness of the tantalum layer must be so thick that it can function as a barrier against movement of aluminum atoms. The present inventors carried out experiments as to the film thickness, and the results are shown in FIGS. 34A to 34C. FIGS. 34A to 34C are photomicrographs showing the states after a treatment at 550xc2x0 C. for 2 hours subsequent to formation of a wiring line using an aluminum layer. The experiments were carried out in both cases where a silicon film by a low pressure CVD method was used as an active layer and a silicon film by a plasma CVD method was used as an active layer.
In FIG. 34A showing a case (conventional structure) where an aluminum single layer (tantalum layer=0 nm) was used, it was ascertained that aluminum diffused (permeated). In FIGS. 34B and 34C showing cases where an aluminum lamination layer (lower layer is a tantalum layer=20 nm, 50 nm) was used, it was ascertained that aluminum did not diffuse and a sufficient blocking effect was obtained. According to the knowledge of the present inventors, the tantalum layer with a thickness of 1 nm or more, preferably 5 nm or more is required. If the thickness is lower than this value, the blocking effect can not be expected.
The upper limit of the thickness is considered to be 400 nm, preferably about 200 nm. If the thickness is larger than this value, the aluminum material layer must be made thin to suppress the total thickness of the gate electrode (to decrease a difference in level), so that the feature of low resistance of aluminum can not be effectively used.
From the above, it is preferable to select the thickness of the tantalum layer within the range of 1 to 400 nm (preferably 1 to 200 nm, more preferably 5 to 50 nm).
The valve metal film such as the tantalum layer has a feature that an anodic oxidation process is easily made in the same electrolytic solution as the aluminum layer, and further, modes of formation of an anodic oxidation layer (progressing direction in a forming process of the oxidation layer, and the like) are close to those of the aluminum film, so that tantalum is a suitable material used in the present invention. In addition, when such a structure is adopted that the lamination gate electrode is coated with the respective anodic oxidation films, the insulation properties are improved and the heat resistance is improved.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device, which comprises a semiconductor circuit including a plurality of TFTs formed on the same substrate, comprises the steps of: forming an active layer by using a crystalline silicon film containing a material for facilitating crystallization of silicon; forming a gate insulating film; forming a gate electrode by sequentially laminating a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; forming a porous alumina layer by selective first anodic oxidation of the material layer containing aluminum or aluminum as its main ingredient; forming a nonporous alumina layer on a surface of the material layer containing aluminum or aluminum as its main ingredient by second anodic oxidation, and at the same time, for transforming the entire or part of the tantalum layer positioned under the porous alumina layer into a tantalum oxide layer; doping a region, which becomes a source region or a drain region of the TFT, with a phosphorus element; and gettering the material by a heat treatment.
In the above method, the heat treatment in the gettering is carried out at a temperature of 450 to 700xc2x0 C.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device, which comprises a semiconductor circuit including a plurality of TFTs formed on the same substrate, comprises the steps of: forming an active layer by using a crystalline silicon film containing a material for facilitating crystallization of silicon; forming a gate insulating film; forming a gate electrode by sequentially laminating a tantalum layer and a material layer containing aluminum or aluminum as its main ingredient; forming a porous alumina layer by selective first anodic oxidation of the material layer containing aluminum or aluminum as its main ingredient; forming a nonporous alumina layer on a surface of the material layer containing aluminum or aluminum as its main ingredient by second anodic oxidation, and at the same time, for transforming part of the tantalum layer positioned under the porous alumina layer into a tantalum oxide layer; removing the porous alumina layer; forming a nonporous alumina layer on a surface of the material layer containing aluminum or aluminum as its main ingredient by third anodic oxidation, and at the same time, for transforming the entire of the tantalum layer positioned under the porous alumina layer into a tantalum oxide layer; carrying out doping of a phosphorus element by using the gate electrode, the tantalum oxide layer, and the gate insulating film as masks; and gettering the material by a heat treatment.
The above method further comprises a step of etching the gate insulating film by using the nonporous alumina layer and the porous alumina layer as masks.
In the above method, the first anodic oxidation is carried out in a solution containing oxalic acid as its main ingredient.
In the above method, the second anodic oxidation is carried out in a solution containing tartaric acid as its main ingredient.
In the above method, the heat treatment at the gettering is carried out at a temperature of 450 to 700xc2x0 C.
According to still another aspect of the present invention, a semiconductor device comprises a semiconductor circuit including a plurality of N-channel TFTs and P-channel TFTs formed on the same substrate, and is characterized in that each of the N-channel TFTs and the P-channel TFTs includes a gate electrode of a lamination of a valve metal layer and a material layer containing aluminum or aluminum as its main ingredient; a gate insulating film being in contact with the gate electrode; a channel formation region being in contact with the gate insulating film; a high resistance region being in contact with the channel formation region; and a source region or a drain region being in contact with the high resistance region, that the source region or the drain region of each of the N-channel TFTs and the P-channel TFTs contains a phosphorus element, and that the source region or the drain region of each of the P-channel TFTs contains an impurity to impart P-type conductivity, the concentration of the impurity being high as compared with the concentration of the phosphorus element.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device, which comprises a semiconductor circuit including a plurality of N-channel TFTs and P-channel TFTs formed on the same substrate, comprises the steps of: forming an active layer by using a crystalline silicon film employing a material for facilitating crystallization of silicon; forming a gate insulating film; forming a gate electrode by sequentially laminating a valve metal layer and a material layer containing aluminum or aluminum as its main ingredient; forming a porous alumina layer by selective first anodic oxidation of the material layer containing aluminum or aluminum as its main ingredient; forming a nonporous alumina layer on a surface of the material layer containing aluminum or aluminum as its main ingredient by second anodic oxidation, and at the same time, for transforming the entire or part of the valve metal layer positioned under the porous alumina layer into an anodic oxidation layer; doping a region, which becomes a source region or a drain region of each of the N-channel TFTs and the P-channel TFTs, with a phosphorus element; gettering the material by a heat treatment; and doping a region, which becomes the source region or the drain region of each of the P-channel TFTs, with an impurity to give P-type conductivity, the concentration of the impurity being higher as compared with the concentration of the phosphorus element.
According to still another aspect of the present invention, a semiconductor device comprises a semiconductor circuit including a plurality of TFTs formed on the same substrate, and is characterized in that each of the TFTs includes a gate electrode of a material layer containing aluminum or aluminum as its main ingredient; a blocking layer being in contact with the gate electrode; a gate insulating film being in contact with the blocking layer; a channel formation region being in contact with the gate insulating film; a high resistance region being in contact with the channel formation region; and a source region or a drain region being in contact with the high resistance region, that the source region or the drain region contains a material at a high concentration which facilitates crystallization of silicon, and that the high resistance region contains the material at a low concentration.
In the above semiconductor device, the blocking layer is a silicon nitride oxide film, a silicon nitride film, a silicon oxide film, or a lamination of those.
According to still another aspect of the present invention, a semiconductor device comprises a semiconductor circuit including a plurality of insulated gate transistors formed on the same substrate, and is characterized in that a gate electrode of each of the insulated gate type transistors includes a metal layer which is formed close to a gate insulating film and mainly contains a metal material having a melting point higher than that of aluminum and being capable of anodically oxidized; an anodic oxidation film of the metal material formed on a side of the metal layer; an aluminum layer or a material layer containing aluminum as its main ingredient formed close to the metal layer; and an alumina layer obtained by anodic oxidation of aluminum and formed on a surface of the aluminum layer or the material layer containing aluminum as its main ingredient, and that a silicide layer is formed in the source region or th e drain region at least at a connection portion to the so urce electrode or the drain electrode.
According to still another aspect of the present invention, a semiconductor device comprises a semicond uctor circuit including a plurality of thin film transistors formed on the same substrate, and is characterized in that a gate electrode of each of the thin film transistors includes a tantalum layer formed close to a gate insulating film; a tantalum oxide layer formed at a side of the tantalum layer; an aluminum layer or a material layer containing aluminum as its main ingredient formed close to the tantalum layer; and an alumina layer formed on a surface of the aluminum layer or the material layer containing aluminum as its main ingredient, and that a silicide layer is formed in the source region or the drain region at least at a connection portion to a source electrode or a drain electrode.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device, which comprises a semiconductor circuit including a plurality of thin film transistors formed on the same substrate, comprises the steps of: forming an active layer made of a material containing silicon as its main ingredient, and a gate insulating film close to the active layer; forming a tantalum layer close to the gate insulating film; forming a material layer containing aluminum or aluminum as its main ingredient close to the tantalum layer; forming a porous alumina layer on a side of the material layer by selectively anodically oxidizing the material layer containing aluminum or aluminum as its main ingredient through a first anodic oxidation process; forming a nonporous alumina layer on a surface of the material layer by anodically oxidizing the material layer containing aluminum or aluminum as its main ingredient through a second anodic oxidation process, and at the same time, for forming a tantalum oxide layer at a side of the tantalum layer by anodic oxidation of the tantalum layer; exposing a surface of source and drain regions of the active layer by patterning the gate insulating film; removing the porous alumina layer; adding an impurity to give one conductivity into the source and drain regions; and making at least a surface of the source and drain regions become silicide.